There are several types of shift registers. Some take data in serially, one bit at a time, and present the data in parallel, all bits simultaneously. These are called Serial-In Parallel-Out (SIPO) shift registers. Others take data in parallel, and present the data one bit at a time, serially, and are called Parallel-In Serial-Out (PISO) shift registers. Regardless of the the type, a 'clock' signal directs the device to move each bit to the next position.
Two more notes about shift registers. Generally the serial output of one shift register can be used as the input to another shift register. In this fashion, shift registers can be strung together to produce any number of inputs or outputs.
Also, the simple shift registers described above would not be very safe to use. An 'on' bit destined for the last output line would be presented on each of the output lines along the way, which could turn things on unintentionally. To combat this, we will use 'latching' shift registers, which add an additional control line that signals when the data is fully shifted, and should be 'latched' onto the outputs (or inputs, in the case of parallel-in serial-out shift registers).
The 74LS597 shift registers require an additional control line to load the data onto the shift registers. This additional line does not require an additional I/O pin from the computer, as it can be created by inverting the RCLK signal with an inverter, like the 7404.
Pin names on the chips may be different than as shown. On a current datasheet I see the following names:
STCP = Storage Register Clock, I referred to as 'Latch', formerly 'RCLK' SHCP = Shift register clock, formerly 'SRClock' DS = Serial data Input, formerly 'Ser' PL = Parallel Load, formerly 'SRLoad'
Other pins such as Output Enable and Reset should be tied high or low as appropriate.
One important note about the HAL component. The terms 'in' and 'out' refer to the direction of data flowing in or out of the component, not the circuit. This may cause some confusion. But just know that information going IN to the HAL component will present itself on the Output of a shift register, and vice-versa.
The diagram above details the way in which the HAL component shifts the data serially. The shift register places the most significant bit (MSB) onto ser_in on the rising edge of the latch pin. On each successive rising edge of the clock pin, the shift register places subsequent bits. Data from ser_in is placed on the Out pins of the HAL component.
Simultaneously, the HAL component reads the values of it's In pins and places the values on ser_out. It updates ser_out during the falling edge of latch and clock signals. The shift register reads these values on the rising edge of clock. When all the data has been read and written, a final latch pulse is given to expose the newly shifted values onto the shift register output pins.
The entire shifting sequence is repeated every millisecond, giving me a 1kHz sampling rate. There are two adjustable parameters to the HAL component, shift_period and update_period that are used to adjust its timings. The shift_period specifies the duration of the clock and latch pulses, in units of base-periods. The default value is 3. The update_period specifies the time delay between shifting sequences, also in units of base-periods. The default value is 300. Your latency may be longer or shorter depending on what thread you use, and how frequently it runs.
sudo comp --install lsrio16.comp
loadrt lsrio16 count=1 addf lsrio16.0 base-thread
Then the 4 pins are networked to your parallel port or digital ip card:
net lsrio-input-stream parport.0.pin-10-in => lsrio16.0.ser-in net lsrio-output-stream lsrio16.0.ser-out => parport.0.pin-14-out net lsrio-clock-output lsrio16.0.clk => parport.0.pin-16-out net lrio-data-latch lsrio16.0.latch => parport.0.pin-17-out
After that, you are free to network your data to the in* and out* ports of the HAL component. Don't forget that data going into the lsrio16.*.in* pins gets presented on the shift register output lines, and the data going into the shift register input lines gets presented on the lsrio16.*.out* pins.
The figure above shows the output of 3 cooling fan tachometers being read through the shift register port expander and displayed on HAL Scope. The pulses are easily resolved with a 1kHz sampling rate, and will be used to detect fan failure. Other tasks are even less sensitive to latency, such as: Spindle On/Off? control, button press detection, AC-Good signals, Overtemp Alarms, and Flood and Mist coolant control.