Get to know your hardware - how to do a JTAG boundary scan for a Mesanet 7i43 under Linux Ubuntu 10.10 AMD64
In this short howto I'd like to show you how to establish communication with your Mesanet 7i43
Use at your own risk.
Many of todays IC come with a special bus called JTAG, which is useful for debugging, programming the IC and development in general. If you have not yet come across JTAG, then please do read the wikipedia article first.
Last summer, I accidentally killed the cpld on the 7i43, which is a XC9572XL. I replaced the cpld on the pcb with a new one. But unlike fpgas, cplds have to be programmed.
Well, there is lots of different hardware out there, so the following is what I used.
- PC with bidirectional parallel port running Linux.
- A parallel port JTAG adapter. I got mine for another fpga project at ebay.de for EUR 13,- incl. shipping. (datasheet: http://www.anvilex.de/Extern/Datasheets/DS_P009_08.pdf). There are many other JTAG adapters available, parallel port clones of the Xilinx cables and USB ones, YMMV.
- And fpga board with a populated jtag header. I had to solder on a header to the 7i43 and create a small adapter cable from my cheap parallel port jtag adapter to match the pinout on the 7i43 board.
- Xilinx ISE WebPACK?, which contains a program called impact. The download is huge and might take a while. The ISE webpack is free as in free beer.
- I personally do not like the Xilinx parallel port driver, since it does not compile on my stock Ubuntu 10.10 AMD64 kernel. Fortunately there is another driver available. Get it this way: git clone git://git.zerfleddert.de/usb-driver
First do check your BIOS. Enable a bidirectional mode, EPP or ECP.
Then install ISE webpack.
Compile the usb-driver by running make in its directory. You quite certainly might want to install compile dependancies first, see the included README.
Check the permissions on your /dev/parport0 first with ls -l /dev/parport0. On Ubuntu, if your user is not in the lp user group then you will need to add your user to this group and log out and log in again. When you log in again, check in your shell with 'id', that you now really belong to the lp group.
In your shell type:
And please to substitute your own path. Example:
Now you need to set the environment variables for ISE, mine are in /home/mx/Xilinx?/12.3/ISE_DS/settings64.sh, so the command is:
Then start impact in your shell by simple entering:
So speed up the invocation of all this I created a small shell script: impact.bash
Now in the first box let impact create a project for you. In the second box let impact identify your devices automatically.
In the next box do not yet assign files to the ICs.
If you want to program the cpld, then look at the files I43CPLD2.JED (200k version) or I43CPLD4.JED (400k version) in the 7i43.zip file on the mesanet web page.
The mesanet 7i43 fpga board
A parallel port jtag cable with an adapter to match the fpga board's jtag connector
Choose no here
Select yes here
Select Ok here
If you want to program the cpld or upload a configuration to the fpga, then select yes here, otherwise no
Choose a file to program the cpld
Accept the suggested device programming properties
And then you should be done
Maximilian_H, January 2011